/* DONT TOUCH: GENERATED FILE! */

#define NUM_ARCH_EVENTS_NEHALEM 481

static PerfmonEvent  nehalem_arch_events[NUM_ARCH_EVENTS_NEHALEM] = {
 {"INSTR_RETIRED_ANY",
  "FIXC0", 
   0x00,0x00}
, {"CPU_CLK_UNHALTED_CORE",
  "FIXC1", 
   0x00,0x00}
, {"CPU_CLK_UNHALTED_REF",
  "FIXC2", 
   0x00,0x00}
, {"SB_FORWARD_ANY",
  "PMC", 
   0x02,0x01}
, {"LOAD_BLOCK_STD",
  "PMC", 
   0x03,0x01}
, {"LOAD_BLOCK_ADDRESS_OFFSET",
  "PMC", 
   0x03,0x04}
, {"SB_DRAIN_ANY",
  "PMC", 
   0x04,0x07}
, {"MISALIGN_MEM_REF_LOAD",
  "PMC", 
   0x05,0x01}
, {"MISALIGN_MEM_REF_STORE",
  "PMC", 
   0x05,0x02}
, {"MISALIGN_MEM_REF_ANY",
  "PMC", 
   0x05,0x03}
, {"STORE_BLOCK_NOT_STA",
  "PMC", 
   0x06,0x01}
, {"STORE_BLOCK_STA",
  "PMC", 
   0x06,0x02}
, {"STORE_BLOCK_AT_RET",
  "PMC", 
   0x06,0x04}
, {"STORE_BLOCK_L1D_BLOCK",
  "PMC", 
   0x06,0x08}
, {"STORE_BLOCK_ANY",
  "PMC", 
   0x06,0x0F}
, {"PARTIAL_ADDRESS_ALIAS",
  "PMC", 
   0x07,0x01}
, {"DTLB_LOAD_MISSES_ANY",
  "PMC", 
   0x08,0x01}
, {"DTLB_LOAD_MISSES_WALK_COMPLETED",
  "PMC", 
   0x08,0x02}
, {"DTLB_LOAD_MISSES_STLB_HIT",
  "PMC", 
   0x08,0x10}
, {"DTLB_LOAD_MISSES_PDE_MISS",
  "PMC", 
   0x08,0x20}
, {"DTLB_LOAD_MISSES_PDP_MISS",
  "PMC", 
   0x08,0x40}
, {"DTLB_LOAD_MISSES_LARGE_WALK_COMPLETED",
  "PMC", 
   0x08,0x80}
, {"MEMORY_DISAMBIGURATION_RESET",
  "PMC", 
   0x09,0x01}
, {"MEMORY_DISAMBIGURATION_SUCCESS",
  "PMC", 
   0x09,0x01}
, {"MEMORY_DISAMBIGURATION_WATCHDOG",
  "PMC", 
   0x09,0x01}
, {"MEMORY_DISAMBIGURATION_WATCH_CYCLES",
  "PMC", 
   0x09,0x01}
, {"MEM_INST_RETIRED_LOADS",
  "PMC", 
   0x0B,0x01}
, {"MEM_INST_RETIRED_STORES",
  "PMC", 
   0x0B,0x02}
, {"MEM_INST_RETIRED_LATENCY_ABOVE_THRESHOLD",
  "PMC", 
   0x0B,0x10}
, {"MEM_STORE_RETIRED_DTLB_MISS",
  "PMC", 
   0x0C,0x01}
, {"UOPS_ISSUED_ANY",
  "PMC", 
   0x0E,0x01}
, {"UOPS_ISSUED_FUSED",
  "PMC", 
   0x0E,0x02}
, {"MEM_UNCORE_RETIRED_OTHER_CORE_L2_HITM",
  "PMC", 
   0x0F,0x02}
, {"MEM_UNCORE_RETIRED_REMOTE_CACHE_LOCAL_HOME_HIT",
  "PMC", 
   0x0F,0x08}
, {"MEM_UNCORE_RETIRED_REMOTE_DRAM",
  "PMC", 
   0x0F,0x10}
, {"MEM_UNCORE_RETIRED_LOCAL_DRAM",
  "PMC", 
   0x0F,0x20}
, {"FP_COMP_OPS_EXE_X87",
  "PMC", 
   0x10,0x01}
, {"FP_COMP_OPS_EXE_MMX",
  "PMC", 
   0x10,0x02}
, {"FP_COMP_OPS_EXE_SSE_FP",
  "PMC", 
   0x10,0x04}
, {"FP_COMP_OPS_EXE_SSE2_INTEGER",
  "PMC", 
   0x10,0x08}
, {"FP_COMP_OPS_EXE_SSE_FP_PACKED",
  "PMC", 
   0x10,0x10}
, {"FP_COMP_OPS_EXE_SSE_FP_SCALAR",
  "PMC", 
   0x10,0x20}
, {"FP_COMP_OPS_EXE_SSE_SINGLE_PRECISION",
  "PMC", 
   0x10,0x40}
, {"FP_COMP_OPS_EXE_SSE_DOUBLE_PRECISION",
  "PMC", 
   0x10,0x80}
, {"SIMD_INT_128_PACKED_MPY",
  "PMC", 
   0x12,0x01}
, {"SIMD_INT_128_PACKED_SHIFT",
  "PMC", 
   0x12,0x02}
, {"SIMD_INT_128_PACK",
  "PMC", 
   0x12,0x04}
, {"SIMD_INT_128_UNPACK",
  "PMC", 
   0x12,0x08}
, {"SIMD_INT_128_PACKED_LOGICAL",
  "PMC", 
   0x12,0x10}
, {"SIMD_INT_128_PACKED_ARITH",
  "PMC", 
   0x12,0x20}
, {"SIMD_INT_128_SHUFFLE_MOVE",
  "PMC", 
   0x12,0x40}
, {"LOAD_DISPATCH_RS",
  "PMC", 
   0x13,0x01}
, {"LOAD_DISPATCH_RS_DELAYED",
  "PMC", 
   0x13,0x02}
, {"LOAD_DISPATCH_MOB",
  "PMC", 
   0x13,0x04}
, {"LOAD_DISPATCH_ANY",
  "PMC", 
   0x13,0x07}
, {"ARITH_CYCLES_DIV_BUSY",
  "PMC", 
   0x14,0x01}
, {"ARITH_MUL",
  "PMC", 
   0x14,0x02}
, {"INST_QUEUE_WRITES",
  "PMC", 
   0x17,0x01}
, {"INST_DECODED_DECO",
  "PMC", 
   0x18,0x01}
, {"TWO_UPOS_INST_DECODED",
  "PMC", 
   0x19,0x01}
, {"HW_INT_RCV",
  "PMC", 
   0x1D,0x01}
, {"HW_CYCLES_MASKED",
  "PMC", 
   0x1D,0x02}
, {"HW_CYCLES_PENDING_AND_MASKED",
  "PMC", 
   0x1D,0x04}
, {"INST_QUEUE_WRITE_CYCLES",
  "PMC", 
   0x1E,0x01}
, {"LSD_OVERFLOW",
  "PMC", 
   0x20,0x01}
, {"L2_RQSTS_LD_HIT",
  "PMC", 
   0x24,0x01}
, {"L2_RQSTS_LD_MISS",
  "PMC", 
   0x24,0x02}
, {"L2_RQSTS_LOADS",
  "PMC", 
   0x24,0x03}
, {"L2_RQSTS_RFO_HIT",
  "PMC", 
   0x24,0x04}
, {"L2_RQSTS_RFO_MISS",
  "PMC", 
   0x24,0x08}
, {"L2_RQSTS_RFOS",
  "PMC", 
   0x24,0x0C}
, {"L2_RQSTS_IFETCH_HIT",
  "PMC", 
   0x24,0x10}
, {"L2_RQSTS_IFETCH_MISS",
  "PMC", 
   0x24,0x20}
, {"L2_RQSTS_IFETCHES",
  "PMC", 
   0x24,0x30}
, {"L2_RQSTS_PREFETCH_HIT",
  "PMC", 
   0x24,0x40}
, {"L2_RQSTS_PREFETCH_MISS",
  "PMC", 
   0x24,0x80}
, {"L2_RQSTS_PREFETCHES",
  "PMC", 
   0x24,0xC0}
, {"L2_RQSTS_MISS",
  "PMC", 
   0x24,0xAA}
, {"L2_RQSTS_REFERENCES",
  "PMC", 
   0x24,0xFF}
, {"L2_DATA_RQSTS_DEMAND_I_STATE",
  "PMC", 
   0x26,0x01}
, {"L2_DATA_RQSTS_DEMAND_S_STATE",
  "PMC", 
   0x26,0x02}
, {"L2_DATA_RQSTS_DEMAND_E_STATE",
  "PMC", 
   0x26,0x04}
, {"L2_DATA_RQSTS_DEMAND_M_STATE",
  "PMC", 
   0x26,0x08}
, {"L2_DATA_RQSTS_DEMAND_MESI",
  "PMC", 
   0x26,0x0F}
, {"L2_DATA_RQSTS_DEMAND_PREFETCH_I_STATE",
  "PMC", 
   0x26,0x10}
, {"L2_DATA_RQSTS_DEMAND_PREFETCH_S_STATE",
  "PMC", 
   0x26,0x20}
, {"L2_DATA_RQSTS_DEMAND_PREFETCH_E_STATE",
  "PMC", 
   0x26,0x40}
, {"L2_DATA_RQSTS_DEMAND_PREFETCH_M_STATE",
  "PMC", 
   0x26,0x80}
, {"L2_DATA_RQSTS_DEMAND_PREFETCH_MESI",
  "PMC", 
   0x26,0xF0}
, {"L2_DATA_RQSTS_DEMAND_ANY",
  "PMC", 
   0x26,0xFF}
, {"L2_WRITE_RFO_I_STATE",
  "PMC", 
   0x27,0x01}
, {"L2_WRITE_RFO_S_STATE",
  "PMC", 
   0x27,0x02}
, {"L2_WRITE_RFO_E_STATE",
  "PMC", 
   0x27,0x04}
, {"L2_WRITE_RFO_M_STATE",
  "PMC", 
   0x27,0x08}
, {"L2_WRITE_RFO_HIT",
  "PMC", 
   0x27,0x0E}
, {"L2_WRITE_RFO_MESI",
  "PMC", 
   0x27,0x0F}
, {"L2_WRITE_LOCK_I_STATE",
  "PMC", 
   0x27,0x10}
, {"L2_WRITE_LOCK_S_STATE",
  "PMC", 
   0x27,0x20}
, {"L2_WRITE_LOCK_E_STATE",
  "PMC", 
   0x27,0x40}
, {"L2_WRITE_LOCK_M_STATE",
  "PMC", 
   0x27,0x80}
, {"L2_WRITE_LOCK_HIT",
  "PMC", 
   0x27,0xE0}
, {"L2_WRITE_LOCK_MESI",
  "PMC", 
   0x27,0xF0}
, {"L1D_WB_L2_I_STATE",
  "PMC", 
   0x28,0x01}
, {"L1D_WB_L2_S_STATE",
  "PMC", 
   0x28,0x02}
, {"L1D_WB_L2_E_STATE",
  "PMC", 
   0x28,0x04}
, {"L1D_WB_L2_M_STATE",
  "PMC", 
   0x28,0x08}
, {"L1D_WB_L2_MESI",
  "PMC", 
   0x28,0x0F}
, {"L3_LAT_CACHE_REFERENCE",
  "PMC", 
   0x2E,0x4F}
, {"L3_LAT_CACHE_MISS",
  "PMC", 
   0x2E,0x41}
, {"CPU_CLOCK_UNHALTED_THREAD_P",
  "PMC", 
   0x3C,0x00}
, {"CPU_CLOCK_UNHALTED_REF_P",
  "PMC", 
   0x3C,0x01}
, {"UOPS_DECODED_DEC0",
  "PMC", 
   0x3C,0x01}
, {"L1D_CACHE_LD_I_STATE",
  "PMC0|PMC1", 
   0x40,0x01}
, {"L1D_CACHE_LD_S_STATE",
  "PMC0|PMC1", 
   0x40,0x02}
, {"L1D_CACHE_LD_E_STATE",
  "PMC0|PMC1", 
   0x40,0x04}
, {"L1D_CACHE_LD_M_STATE",
  "PMC0|PMC1", 
   0x40,0x08}
, {"L1D_CACHE_LD_MESI",
  "PMC0|PMC1", 
   0x40,0x0F}
, {"L1D_CACHE_ST_I_STATE",
  "PMC0|PMC1", 
   0x41,0x01}
, {"L1D_CACHE_ST_S_STATE",
  "PMC0|PMC1", 
   0x41,0x02}
, {"L1D_CACHE_ST_E_STATE",
  "PMC0|PMC1", 
   0x41,0x04}
, {"L1D_CACHE_ST_M_STATE",
  "PMC0|PMC1", 
   0x41,0x08}
, {"L1D_CACHE_ST_MESI",
  "PMC0|PMC1", 
   0x41,0x0F}
, {"L1D_CACHE_LOCK_HIT",
  "PMC0|PMC1", 
   0x42,0x01}
, {"L1D_CACHE_LOCK_S_STATE",
  "PMC0|PMC1", 
   0x42,0x02}
, {"L1D_CACHE_LOCK_E_STATE",
  "PMC0|PMC1", 
   0x42,0x04}
, {"L1D_CACHE_LOCK_M_STATE",
  "PMC0|PMC1", 
   0x42,0x08}
, {"L1D_ALL_REF_ANY",
  "PMC0|PMC1", 
   0x43,0x01}
, {"L1D_ALL_REF_CACHEABLE",
  "PMC0|PMC1", 
   0x43,0x02}
, {"L1D_PEND_MISS_LOAD_BUFFERS_FULL",
  "PMC0|PMC1", 
   0x48,0x02}
, {"DTLB_MISSES_ANY",
  "PMC", 
   0x49,0x01}
, {"DTLB_MISSES_WALK_COMPLETED",
  "PMC", 
   0x49,0x02}
, {"DTLB_MISSES_STLB_HIT",
  "PMC", 
   0x49,0x10}
, {"DTLB_MISSES_PDE_MISS",
  "PMC", 
   0x49,0x20}
, {"DTLB_MISSES_PDP_MISS",
  "PMC", 
   0x49,0x40}
, {"DTLB_MISSES_LARGE_WALK_COMPLETED",
  "PMC", 
   0x49,0x80}
, {"SSE_MEM_EXEC_NTA",
  "PMC", 
   0x4B,0x01}
, {"SSE_MEM_EXEC_STREAMING_STORES",
  "PMC", 
   0x4B,0x08}
, {"LOAD_HIT_PRE",
  "PMC", 
   0x4C,0x01}
, {"SFENCE_CYCLES",
  "PMC", 
   0x4D,0x01}
, {"L1D_PREFETCH_REQUESTS",
  "PMC", 
   0x4E,0x01}
, {"L1D_PREFETCH_MISS",
  "PMC", 
   0x4E,0x02}
, {"L1D_PREFETCH_TRIGGERS",
  "PMC", 
   0x4E,0x04}
, {"EPT_EPDE_MISS",
  "PMC", 
   0x4F,0x02}
, {"EPT_EPDPE_HIT",
  "PMC", 
   0x4F,0x04}
, {"EPT_EPDPE_MISS",
  "PMC", 
   0x4F,0x08}
, {"L1D_REPL",
  "PMC0|PMC1", 
   0x51,0x01}
, {"L1D_M_REPL",
  "PMC0|PMC1", 
   0x51,0x02}
, {"L1D_M_EVICT",
  "PMC0|PMC1", 
   0x51,0x04}
, {"L1D_M_SNOOP_EVICT",
  "PMC0|PMC1", 
   0x51,0x08}
, {"L1D_CACHE_PREFETCH_LOCK_FB_HIT",
  "PMC", 
   0x52,0x01}
, {"L1D_CACHE_LOCK_FB_HIT",
  "PMC0|PMC1", 
   0x53,0x01}
, {"OFFCORE_EVENTS_OUTSTANDING_DEMAND_READ_DATA",
  "PMC", 
   0x60,0x01}
, {"OFFCORE_EVENTS_OUTSTANDING_DEMAND_READ_CODE",
  "PMC", 
   0x60,0x02}
, {"OFFCORE_EVENTS_OUTSTANDING_DEMAND_RFO",
  "PMC", 
   0x60,0x04}
, {"OFFCORE_EVENTS_OUTSTANDING_ANY_READ",
  "PMC", 
   0x60,0x08}
, {"CACHE_LOCK_CYCLES_L1D_L2",
  "PMC", 
   0x63,0x01}
, {"CACHE_LOCK_CYCLES_L1D",
  "PMC", 
   0x63,0x02}
, {"IO_TRANSACTIONS",
  "PMC", 
   0x6C,0x01}
, {"L1I_HITS",
  "PMC", 
   0x80,0x01}
, {"L1I_MISSES",
  "PMC", 
   0x80,0x02}
, {"L1I_READS",
  "PMC", 
   0x80,0x03}
, {"L1I_CYCLES_STALLED",
  "PMC", 
   0x80,0x04}
, {"IFU_IVC_FULL",
  "PMC", 
   0x81,0x01}
, {"IFU_IVC_L1I_EVICTION",
  "PMC", 
   0x81,0x02}
, {"LARGE_ITLB_HIT",
  "PMC", 
   0x82,0x01}
, {"L1I_OPPORTUNISTIC_HITS",
  "PMC", 
   0x83,0x01}
, {"ITLB_MISSES_ANY",
  "PMC", 
   0x85,0x01}
, {"ITLB_MISSES_WALK_COMPLETED",
  "PMC", 
   0x85,0x02}
, {"ITLB_STALL_LCP",
  "PMC", 
   0x87,0x01}
, {"ITLB_STALL_MRU",
  "PMC", 
   0x87,0x02}
, {"ITLB_STALL_IQ_FULL",
  "PMC", 
   0x87,0x04}
, {"ITLB_STALL_REGEN",
  "PMC", 
   0x87,0x08}
, {"ITLB_STALL_ANY",
  "PMC", 
   0x87,0x0F}
, {"BR_INST_EXEC_COND",
  "PMC", 
   0x88,0x01}
, {"BR_INST_EXEC_DIRECT",
  "PMC", 
   0x88,0x02}
, {"BR_INST_EXEC_INDIRECT_NON_CALL",
  "PMC", 
   0x88,0x04}
, {"BR_INST_EXEC_NON_CALLS",
  "PMC", 
   0x88,0x07}
, {"BR_INST_EXEC_RETURN_NEAR",
  "PMC", 
   0x88,0x08}
, {"BR_INST_EXEC_DIRECT_NEAR_CALL",
  "PMC", 
   0x88,0x10}
, {"BR_INST_EXEC_INDIRECT_NEAR_CALL",
  "PMC", 
   0x88,0x20}
, {"BR_INST_EXEC_NEAR_CALLS",
  "PMC", 
   0x88,0x30}
, {"BR_INST_EXEC_TAKEN",
  "PMC", 
   0x88,0x40}
, {"BR_INST_EXEC_ANY",
  "PMC", 
   0x88,0x7F}
, {"BR_MISP_EXEC_COND",
  "PMC", 
   0x89,0x01}
, {"BR_MISP_EXEC_DIRECT",
  "PMC", 
   0x89,0x02}
, {"BR_MISP_EXEC_INDIRECT_NON_CALL",
  "PMC", 
   0x89,0x04}
, {"BR_MISP_EXEC_NON_CALLS",
  "PMC", 
   0x89,0x07}
, {"BR_MISP_EXEC_RETURN_NEAR",
  "PMC", 
   0x89,0x08}
, {"BR_MISP_EXEC_DIRECT_NEAR_CALL",
  "PMC", 
   0x89,0x10}
, {"BR_MISP_EXEC_INDIRECT_NEAR_CALL",
  "PMC", 
   0x89,0x20}
, {"BR_MISP_EXEC_NEAR_CALLS",
  "PMC", 
   0x89,0x30}
, {"BR_MISP_EXEC_TAKEN",
  "PMC", 
   0x89,0x40}
, {"BR_MISP_EXEC_ANY",
  "PMC", 
   0x89,0x7F}
, {"RESOURCE_STALLS_ANY",
  "PMC", 
   0xA2,0x01}
, {"RESOURCE_STALLS_LOAD",
  "PMC", 
   0xA2,0x02}
, {"RESOURCE_STALLS_RS_FULL",
  "PMC", 
   0xA2,0x04}
, {"RESOURCE_STALLS_STORE",
  "PMC", 
   0xA2,0x08}
, {"RESOURCE_STALLS_ROB_FULL",
  "PMC", 
   0xA2,0x10}
, {"RESOURCE_STALLS_FPCW",
  "PMC", 
   0xA2,0x20}
, {"RESOURCE_STALLS_MXCSR",
  "PMC", 
   0xA2,0x40}
, {"RESOURCE_STALLS_OTHER",
  "PMC", 
   0xA2,0x80}
, {"MACRO_INSTS_FUSIONS_DECODED",
  "PMC", 
   0xA6,0x01}
, {"BACLEAR_FORCE_IQ",
  "PMC", 
   0xA7,0x01}
, {"LSD_UOPS",
  "PMC", 
   0xA8,0x01}
, {"ITLB_FLUSH",
  "PMC", 
   0xAE,0x01}
, {"OFFCORE_REQUESTS_L1D_WRITEBACK",
  "PMC", 
   0xB0,0x40}
, {"UOPS_EXECUTED_PORT0",
  "PMC", 
   0xB1,0x01}
, {"UOPS_EXECUTED_PORT1",
  "PMC", 
   0xB1,0x02}
, {"UOPS_EXECUTED_PORT2_CORE",
  "PMC", 
   0xB1,0x04}
, {"UOPS_EXECUTED_PORT3_CORE",
  "PMC", 
   0xB1,0x08}
, {"UOPS_EXECUTED_PORT4_CORE",
  "PMC", 
   0xB1,0x10}
, {"UOPS_EXECUTED_PORT5",
  "PMC", 
   0xB1,0x20}
, {"UOPS_EXECUTED_PORT015",
  "PMC", 
   0xB1,0x40}
, {"UOPS_EXECUTED_PORT234",
  "PMC", 
   0xB1,0x80}
, {"OFFCORE_REQUESTS_SQ_FULL",
  "PMC", 
   0xB2,0x01}
, {"SNOOP_RESPONSE_HIT",
  "PMC", 
   0xB8,0x01}
, {"SNOOP_RESPONSE_HITE",
  "PMC", 
   0xB8,0x02}
, {"SNOOP_RESPONSE_HITM",
  "PMC", 
   0xB8,0x04}
, {"INST_RETIRED_ANY_P",
  "PMC", 
   0xC0,0x01}
, {"INST_RETIRED_X87",
  "PMC", 
   0xC0,0x02}
, {"INST_RETIRED_MMX",
  "PMC", 
   0xC0,0x04}
, {"UOPS_RETIRED_ANY",
  "PMC", 
   0xC2,0x01}
, {"UOPS_RETIRED_RETIRE_SLOTS",
  "PMC", 
   0xC2,0x02}
, {"UOPS_RETIRED_MACRO_FUSED",
  "PMC", 
   0xC2,0x04}
, {"MACHINE_CLEARS_CYCLES",
  "PMC", 
   0xC3,0x01}
, {"MACHINE_CLEARS_MEM_ORDER",
  "PMC", 
   0xC3,0x02}
, {"MACHINE_CLEARS_SMC",
  "PMC", 
   0xC3,0x04}
, {"BR_INST_RETIRED_ALL_BRANCHES",
  "PMC", 
   0xC4,0x00}
, {"BR_INST_RETIRED_CONDITIONAL",
  "PMC", 
   0xC4,0x01}
, {"BR_INST_RETIRED_NEAR_CALL",
  "PMC", 
   0xC4,0x02}
, {"BR_INST_RETIRED_ALL_BRANCHES",
  "PMC", 
   0xC4,0x04}
, {"BR_MISP_RETIRED_ALL_BRANCHES",
  "PMC", 
   0xC5,0x00}
, {"BR_MISP_RETIRED_NEAR_CALL",
  "PMC", 
   0xC5,0x02}
, {"SSEX_UOPS_RETIRED_PACKED_SINGLE",
  "PMC", 
   0xC7,0x01}
, {"SSEX_UOPS_RETIRED_SCALAR_SINGLE",
  "PMC", 
   0xC7,0x02}
, {"SSEX_UOPS_RETIRED_PACKED_DOUBLE",
  "PMC", 
   0xC7,0x04}
, {"SSEX_UOPS_RETIRED_SCALAR_DOUBLE",
  "PMC", 
   0xC7,0x08}
, {"SSEX_UOPS_RETIRED_VECTOR_INTEGER",
  "PMC", 
   0xC7,0x10}
, {"ITLB_MISS_RETIRED",
  "PMC", 
   0xC8,0x20}
, {"MEM_LOAD_RETIRED_L1D_HIT",
  "PMC", 
   0xCB,0x01}
, {"MEM_LOAD_RETIRED_L2_HIT",
  "PMC", 
   0xCB,0x02}
, {"MEM_LOAD_RETIRED_L3_UNSHARED_HIT",
  "PMC", 
   0xCB,0x04}
, {"MEM_LOAD_RETIRED_OTHER_CORE_L2_HIT_HITM",
  "PMC", 
   0xCB,0x08}
, {"MEM_LOAD_RETIRED_L3_MISS",
  "PMC", 
   0xCB,0x10}
, {"MEM_LOAD_RETIRED_HIT_LFB",
  "PMC", 
   0xCB,0x40}
, {"MEM_LOAD_RETIRED_DTLB_MISS",
  "PMC", 
   0xCB,0x80}
, {"FP_MMX_TRANS_TO_FP",
  "PMC", 
   0xCC,0x01}
, {"FP_MMX_TRANS_TO_MMX",
  "PMC", 
   0xCC,0x02}
, {"FP_MMX_TRANS_TO_ANY",
  "PMC", 
   0xCC,0x03}
, {"MACRO_INSTS_DECODED",
  "PMC", 
   0xD0,0x01}
, {"UOPS_DECODED_MS",
  "PMC", 
   0xD1,0x02}
, {"UOPS_DECODED_ESP_FOLDING",
  "PMC", 
   0xD1,0x04}
, {"UOPS_DECODED_ESP_SYNC",
  "PMC", 
   0xD1,0x08}
, {"RAT_STALLS_FLAGS",
  "PMC", 
   0xD2,0x01}
, {"RAT_STALLS_REGISTERS",
  "PMC", 
   0xD2,0x02}
, {"RAT_STALLS_ROB_READ_PORT",
  "PMC", 
   0xD2,0x04}
, {"RAT_STALLS_SCOREBOARD",
  "PMC", 
   0xD2,0x08}
, {"RAT_STALLS_ANY",
  "PMC", 
   0xD2,0x0F}
, {"SEG_RENAME_STALLS",
  "PMC", 
   0xD4,0x01}
, {"ES_SEG_RENAMES",
  "PMC", 
   0xD5,0x01}
, {"UOP_UNFUSION",
  "PMC", 
   0xDB,0x01}
, {"BR_INST_DECODED",
  "PMC", 
   0xE0,0x01}
, {"BPU_MISSED_CALL_RET",
  "PMC", 
   0xE5,0x01}
, {"BACLEAR_CLEAR",
  "PMC", 
   0xE6,0x01}
, {"BACLEAR_BAD_TARGET",
  "PMC", 
   0xE6,0x02}
, {"BPU_CLEARS_EARLY",
  "PMC", 
   0xE8,0x01}
, {"BPU_CLEARS_LATE",
  "PMC", 
   0xE8,0x02}
, {"BPU_CLEARS_ANY",
  "PMC", 
   0xE8,0x03}
, {"L2_TRANSACTIONS_LOAD",
  "PMC", 
   0xF0,0x01}
, {"L2_TRANSACTIONS_RFO",
  "PMC", 
   0xF0,0x02}
, {"L2_TRANSACTIONS_IFETCH",
  "PMC", 
   0xF0,0x04}
, {"L2_TRANSACTIONS_PREFETCH",
  "PMC", 
   0xF0,0x08}
, {"L2_TRANSACTIONS_L1D_WB",
  "PMC", 
   0xF0,0x10}
, {"L2_TRANSACTIONS_L1D_FILL",
  "PMC", 
   0xF0,0x20}
, {"L2_TRANSACTIONS_L1D_WB",
  "PMC", 
   0xF0,0x40}
, {"L2_TRANSACTIONS_L1D_ANY",
  "PMC", 
   0xF0,0x80}
, {"L2_LINES_IN_S_STATE",
  "PMC", 
   0xF1,0x02}
, {"L2_LINES_IN_E_STATE",
  "PMC", 
   0xF1,0x04}
, {"L2_LINES_IN_ANY",
  "PMC", 
   0xF1,0x07}
, {"L2_LINES_OUT_DEMAND_CLEAN",
  "PMC", 
   0xF2,0x01}
, {"L2_LINES_OUT_DEMAND_DIRTY",
  "PMC", 
   0xF2,0x02}
, {"L2_LINES_OUT_PREFETCH_CLEAN",
  "PMC", 
   0xF2,0x04}
, {"L2_LINES_OUT_PREFETCH_DIRTY",
  "PMC", 
   0xF2,0x08}
, {"L2_LINES_OUT_ANY",
  "PMC", 
   0xF2,0x0F}
, {"L2_HW_PREFETCH_HIT",
  "PMC", 
   0xF3,0x01}
, {"L2_HW_PREFETCH_ALLOC",
  "PMC", 
   0xF3,0x02}
, {"L2_HW_PREFETCH_DATA_TRIGGER",
  "PMC", 
   0xF3,0x04}
, {"L2_HW_PREFETCH_CODE_TRIGGER",
  "PMC", 
   0xF3,0x08}
, {"L2_HW_PREFETCH_DCA_TRIGGER",
  "PMC", 
   0xF3,0x10}
, {"L2_HW_PREFETCH_KICK_START",
  "PMC", 
   0xF3,0x20}
, {"SQ_MISC_PROMOTION",
  "PMC", 
   0xF4,0x01}
, {"SQ_MISC_PROMOTION_POST_GO",
  "PMC", 
   0xF4,0x02}
, {"SQ_MISC_LRU_HINTS",
  "PMC", 
   0xF4,0x04}
, {"SQ_MISC_FILL_DROPPED",
  "PMC", 
   0xF4,0x08}
, {"SQ_MISC_SPLIT_LOCK",
  "PMC", 
   0xF4,0x10}
, {"SQ_FULL_STALL_CYCLES",
  "PMC", 
   0xF6,0x01}
, {"FP_ASSIST_ALL",
  "PMC", 
   0xF7,0x01}
, {"FP_ASSIST_OUTPUT",
  "PMC", 
   0xF7,0x02}
, {"FP_ASSIST_INPUT",
  "PMC", 
   0xF7,0x04}
, {"SIMD_INT_64_PACKED_MPY",
  "PMC", 
   0xFD,0x01}
, {"SIMD_INT_64_PACKED_SHIFT",
  "PMC", 
   0xFD,0x02}
, {"SIMD_INT_64_PACK",
  "PMC", 
   0xFD,0x04}
, {"SIMD_INT_64_UNPACK",
  "PMC", 
   0xFD,0x08}
, {"SIMD_INT_64_PACKED_LOGICAL",
  "PMC", 
   0xFD,0x10}
, {"SIMD_INT_64_PACKED_ARITH",
  "PMC", 
   0xFD,0x20}
, {"SIMD_INT_64_SHUFFLE_MOVE",
  "PMC", 
   0xFD,0x40}
, {"UNC_GQ_CYCLES_FULL_READ_TRACKER",
  "UPMC", 
   0x00,0x01}
, {"UNC_GQ_CYCLES_FULL_WRITE_TRACKER",
  "UPMC", 
   0x00,0x02}
, {"UNC_GQ_CYCLES_FULL_PEER_PROBE_TRACKER",
  "UPMC", 
   0x00,0x04}
, {"UNC_GQ_CYCLES_NOT_EMPTY_READ_TRACKER",
  "UPMC", 
   0x01,0x01}
, {"UNC_GQ_CYCLES_NOT_EMPTY_WRITE_TRACKER",
  "UPMC", 
   0x01,0x02}
, {"UNC_GQ_CYCLES_NOT_EMPTY_PEER_PROBE_TRACKER",
  "UPMC", 
   0x01,0x04}
, {"UNC_GQ_ALLOC_READ_TRACKER",
  "UPMC", 
   0x03,0x01}
, {"UNC_GQ_ALLOC_RT_L3_MISS",
  "UPMC", 
   0x03,0x02}
, {"UNC_GQ_ALLOC_RT_TO_L3_RESP",
  "UPMC", 
   0x03,0x04}
, {"UNC_GQ_ALLOC_RT_TO_RTID_ACQUIRED",
  "UPMC", 
   0x03,0x08}
, {"UNC_GQ_ALLOC_WT_TO_RTID_ACQUIRED",
  "UPMC", 
   0x03,0x10}
, {"UNC_GQ_ALLOC_WRITE_TRACKER",
  "UPMC", 
   0x03,0x20}
, {"UNC_GQ_ALLOC_PEER_PROBE_TRACKER",
  "UPMC", 
   0x03,0x40}
, {"UNC_GQ_DATA_FROM_QPI",
  "UPMC", 
   0x04,0x01}
, {"UNC_GQ_DATA_FROM_QMC",
  "UPMC", 
   0x04,0x02}
, {"UNC_GQ_DATA_FROM_L3",
  "UPMC", 
   0x04,0x04}
, {"UNC_GQ_DATA_FROM_CORES_02",
  "UPMC", 
   0x04,0x08}
, {"UNC_GQ_DATA_FROM_CORES_13",
  "UPMC", 
   0x04,0x10}
, {"UNC_GQ_DATA_TO_QPI_QMC",
  "UPMC", 
   0x05,0x01}
, {"UNC_GQ_DATA_TO_L3",
  "UPMC", 
   0x05,0x02}
, {"UNC_GQ_DATA_TO_CORES",
  "UPMC", 
   0x05,0x04}
, {"UNC_SNP_RESP_TO_LOCAL_HOME_I_STATE",
  "UPMC", 
   0x06,0x01}
, {"UNC_SNP_RESP_TO_LOCAL_HOME_S_STATE",
  "UPMC", 
   0x06,0x02}
, {"UNC_SNP_RESP_TO_LOCAL_HOME_FWD_S_STATE",
  "UPMC", 
   0x06,0x04}
, {"UNC_SNP_RESP_TO_LOCAL_HOME_FWD_I_STATE",
  "UPMC", 
   0x06,0x08}
, {"UNC_SNP_RESP_TO_LOCAL_HOME_CONFLICT",
  "UPMC", 
   0x06,0x10}
, {"UNC_SNP_RESP_TO_LOCAL_HOME_WB",
  "UPMC", 
   0x06,0x20}
, {"UNC_SNP_RESP_TO_REMOTE_HOME_I_STATE",
  "UPMC", 
   0x07,0x01}
, {"UNC_SNP_RESP_TO_REMOTE_HOME_S_STATE",
  "UPMC", 
   0x07,0x02}
, {"UNC_SNP_RESP_TO_REMOTE_HOME_FWD_S_STATE",
  "UPMC", 
   0x07,0x04}
, {"UNC_SNP_RESP_TO_REMOTE_HOME_FWD_I_STATE",
  "UPMC", 
   0x07,0x08}
, {"UNC_SNP_RESP_TO_REMOTE_HOME_CONFLICT",
  "UPMC", 
   0x07,0x10}
, {"UNC_SNP_RESP_TO_REMOTE_HOME_WB",
  "UPMC", 
   0x07,0x20}
, {"UNC_SNP_RESP_TO_REMOTE_HOME_HITM",
  "UPMC", 
   0x07,0x24}
, {"UNC_L3_HITS_READ",
  "UPMC", 
   0x08,0x01}
, {"UNC_L3_HITS_WRITE",
  "UPMC", 
   0x08,0x02}
, {"UNC_L3_HITS_PROBE",
  "UPMC", 
   0x08,0x04}
, {"UNC_L3_HITS_ANY",
  "UPMC", 
   0x08,0x03}
, {"UNC_L3_MISS_READ",
  "UPMC", 
   0x09,0x01}
, {"UNC_L3_MISS_WRITE",
  "UPMC", 
   0x09,0x02}
, {"UNC_L3_MISS_PROBE",
  "UPMC", 
   0x09,0x04}
, {"UNC_L3_MISS_ANY",
  "UPMC", 
   0x09,0x03}
, {"UNC_L3_LINES_IN_M_STATE",
  "UPMC", 
   0x0A,0x01}
, {"UNC_L3_LINES_IN_E_STATE",
  "UPMC", 
   0x0A,0x02}
, {"UNC_L3_LINES_IN_S_STATE",
  "UPMC", 
   0x0A,0x04}
, {"UNC_L3_LINES_IN_F_STATE",
  "UPMC", 
   0x0A,0x08}
, {"UNC_L3_LINES_IN_ANY",
  "UPMC", 
   0x0A,0x0F}
, {"UNC_L3_LINES_OUT_M_STATE",
  "UPMC", 
   0x0B,0x01}
, {"UNC_L3_LINES_OUT_E_STATE",
  "UPMC", 
   0x0B,0x02}
, {"UNC_L3_LINES_OUT_S_STATE",
  "UPMC", 
   0x0B,0x04}
, {"UNC_L3_LINES_OUT_I_STATE",
  "UPMC", 
   0x0B,0x08}
, {"UNC_L3_LINES_OUT_F_STATE",
  "UPMC", 
   0x0B,0x10}
, {"UNC_L3_LINES_OUT_ANY",
  "UPMC", 
   0x0B,0x1F}
, {"UNC_QHL_REQUESTS_IOH_READS",
  "UPMC", 
   0x20,0x01}
, {"UNC_QHL_REQUESTS_IOH_WRITES",
  "UPMC", 
   0x20,0x02}
, {"UNC_QHL_REQUESTS_REMOTE_READS",
  "UPMC", 
   0x20,0x04}
, {"UNC_QHL_REQUESTS_REMOTE_WRITES",
  "UPMC", 
   0x20,0x08}
, {"UNC_QHL_REQUESTS_LOCAL_READS",
  "UPMC", 
   0x20,0x10}
, {"UNC_QHL_REQUESTS_LOCAL_WRITES",
  "UPMC", 
   0x20,0x20}
, {"UNC_QHL_CYCLES_FULL_IOH",
  "UPMC", 
   0x21,0x01}
, {"UNC_QHL_CYCLES_FULL_REMOTE",
  "UPMC", 
   0x21,0x02}
, {"UNC_QHL_CYCLES_FULL_LOCAL",
  "UPMC", 
   0x21,0x04}
, {"UNC_QHL_CYCLES_NOT_EMPTY_IOH",
  "UPMC", 
   0x22,0x01}
, {"UNC_QHL_CYCLES_NOT_EMPTY_REMOTE",
  "UPMC", 
   0x22,0x02}
, {"UNC_QHL_CYCLES_NOT_EMPTY_LOCAL",
  "UPMC", 
   0x22,0x04}
, {"UNC_QHL_OCCUPANCY_IOH",
  "UPMC", 
   0x23,0x01}
, {"UNC_QHL_OCCUPANCY_REMOTE",
  "UPMC", 
   0x23,0x02}
, {"UNC_QHL_OCCUPANCY_LOCAL",
  "UPMC", 
   0x23,0x04}
, {"UNC_QHL_ADDRESS_CONFLICTS_2WAY",
  "UPMC", 
   0x24,0x02}
, {"UNC_QHL_ADDRESS_CONFLICTS_3WAY",
  "UPMC", 
   0x24,0x04}
, {"UNC_QHL_CONFLICT_CYCLES_IOH",
  "UPMC", 
   0x25,0x01}
, {"UNC_QHL_CONFLICT_CYCLES_REMOTE",
  "UPMC", 
   0x25,0x02}
, {"UNC_QHL_CONFLICT_CYCLES_LOCAL",
  "UPMC", 
   0x25,0x04}
, {"UNC_QHL_TO_QMC_BYPASS",
  "UPMC", 
   0x26,0x01}
, {"UNC_QMC_NORMAL_FULL_READ_CH0",
  "UPMC", 
   0x27,0x01}
, {"UNC_QMC_NORMAL_FULL_READ_CH1",
  "UPMC", 
   0x27,0x02}
, {"UNC_QMC_NORMAL_FULL_READ_CH2",
  "UPMC", 
   0x27,0x04}
, {"UNC_QMC_NORMAL_FULL_WRITE_CH0",
  "UPMC", 
   0x27,0x08}
, {"UNC_QMC_NORMAL_FULL_WRITE_CH1",
  "UPMC", 
   0x27,0x10}
, {"UNC_QMC_NORMAL_FULL_WRITE_CH2",
  "UPMC", 
   0x27,0x20}
, {"UNC_QMC_ISOC_FULL_READ_CH0",
  "UPMC", 
   0x28,0x01}
, {"UNC_QMC_ISOC_FULL_READ_CH1",
  "UPMC", 
   0x28,0x02}
, {"UNC_QMC_ISOC_FULL_READ_CH2",
  "UPMC", 
   0x28,0x04}
, {"UNC_QMC_ISOC_FULL_WRITE_CH0",
  "UPMC", 
   0x28,0x08}
, {"UNC_QMC_ISOC_FULL_WRITE_CH1",
  "UPMC", 
   0x28,0x10}
, {"UNC_QMC_ISOC_FULL_WRITE_CH2",
  "UPMC", 
   0x28,0x20}
, {"UNC_QMC_BUSY_READ_CH0",
  "UPMC", 
   0x29,0x01}
, {"UNC_QMC_BUSY_READ_CH1",
  "UPMC", 
   0x29,0x02}
, {"UNC_QMC_BUSY_READ_CH2",
  "UPMC", 
   0x29,0x04}
, {"UNC_QMC_BUSY_WRITE_CH0",
  "UPMC", 
   0x29,0x08}
, {"UNC_QMC_BUSY_WRITE_CH1",
  "UPMC", 
   0x29,0x10}
, {"UNC_QMC_BUSY_WRITE_CH2",
  "UPMC", 
   0x29,0x20}
, {"UNC_QMC_OCCUPANCY_CH0",
  "UPMC", 
   0x2A,0x01}
, {"UNC_QMC_OCCUPANCY_CH1",
  "UPMC", 
   0x2A,0x02}
, {"UNC_QMC_OCCUPANCY_CH2",
  "UPMC", 
   0x2A,0x04}
, {"UNC_QMC_ISSOC_OCCUPANCY_CH0",
  "UPMC", 
   0x2B,0x01}
, {"UNC_QMC_ISSOC_OCCUPANCY_CH1",
  "UPMC", 
   0x2B,0x02}
, {"UNC_QMC_ISSOC_OCCUPANCY_CH2",
  "UPMC", 
   0x2B,0x04}
, {"UNC_QMC_ISSOC_READS_ANY",
  "UPMC", 
   0x2B,0x07}
, {"UNC_QMC_NORMAL_READS_CH0",
  "UPMC", 
   0x2C,0x01}
, {"UNC_QMC_NORMAL_READS_CH1",
  "UPMC", 
   0x2C,0x02}
, {"UNC_QMC_NORMAL_READS_CH2",
  "UPMC", 
   0x2C,0x04}
, {"UNC_QMC_NORMAL_READS_ANY",
  "UPMC", 
   0x2C,0x07}
, {"UNC_QMC_HIGH_PRIORITY_READS_CH0",
  "UPMC", 
   0x2D,0x01}
, {"UNC_QMC_HIGH_PRIORITY_READS_CH1",
  "UPMC", 
   0x2D,0x02}
, {"UNC_QMC_HIGH_PRIORITY_READS_CH2",
  "UPMC", 
   0x2D,0x04}
, {"UNC_QMC_HIGH_PRIORITY_READS_ANY",
  "UPMC", 
   0x2D,0x07}
, {"UNC_QMC_CRITICAL_PRIORITY_READS_CH0",
  "UPMC", 
   0x2E,0x01}
, {"UNC_QMC_CRITICAL_PRIORITY_READS_CH1",
  "UPMC", 
   0x2E,0x02}
, {"UNC_QMC_CRITICAL_PRIORITY_READS_CH2",
  "UPMC", 
   0x2E,0x04}
, {"UNC_QMC_CRITICAL_PRIORITY_READS_ANY",
  "UPMC", 
   0x2E,0x07}
, {"UNC_QMC_WRITES_FULL_CH0",
  "UPMC", 
   0x2F,0x01}
, {"UNC_QMC_WRITES_FULL_CH1",
  "UPMC", 
   0x2F,0x02}
, {"UNC_QMC_WRITES_FULL_CH2",
  "UPMC", 
   0x2F,0x04}
, {"UNC_QMC_WRITES_FULL_ANY",
  "UPMC", 
   0x2F,0x07}
, {"UNC_QMC_WRITES_PARTIAL_CH0",
  "UPMC", 
   0x2F,0x08}
, {"UNC_QMC_WRITES_PARTIAL_CH1",
  "UPMC", 
   0x2F,0x10}
, {"UNC_QMC_WRITES_PARTIAL_CH2",
  "UPMC", 
   0x2F,0x20}
, {"UNC_QMC_WRITES_PARTIAL_ANY",
  "UPMC", 
   0x2F,0x38}
, {"UNC_QMC_CANCEL_CH0",
  "UPMC", 
   0x30,0x01}
, {"UNC_QMC_CANCEL_CH1",
  "UPMC", 
   0x30,0x02}
, {"UNC_QMC_CANCEL_CH2",
  "UPMC", 
   0x30,0x04}
, {"UNC_QMC_CANCEL_ANY",
  "UPMC", 
   0x30,0x07}
, {"UNC_QMC_PRIORITY_UPDATES_CH0",
  "UPMC", 
   0x31,0x01}
, {"UNC_QMC_PRIORITY_UPDATES_CH1",
  "UPMC", 
   0x31,0x02}
, {"UNC_QMC_PRIORITY_UPDATES_CH2",
  "UPMC", 
   0x31,0x04}
, {"UNC_QMC_PRIORITY_UPDATES_ANY",
  "UPMC", 
   0x31,0x07}
, {"UNC_QHL_FRC_ACK_CNFLTS_LOCAL",
  "UPMC", 
   0x33,0x04}
, {"UNC_QPI_TX_STALLED_SINGLE_FLIT_HOME_LINK_0",
  "UPMC", 
   0x40,0x01}
, {"UNC_QPI_TX_STALLED_SINGLE_FLIT_SNOOP_LINK_0",
  "UPMC", 
   0x40,0x02}
, {"UNC_QPI_TX_STALLED_SINGLE_FLIT_NDR_LINK_0",
  "UPMC", 
   0x40,0x04}
, {"UNC_QPI_TX_STALLED_SINGLE_FLIT_HOME_LINK_1",
  "UPMC", 
   0x40,0x08}
, {"UNC_QPI_TX_STALLED_SINGLE_FLIT_SNOOP_LINK_1",
  "UPMC", 
   0x40,0x10}
, {"UNC_QPI_TX_STALLED_SINGLE_FLIT_NDR_LINK_1",
  "UPMC", 
   0x40,0x20}
, {"UNC_QPI_TX_STALLED_SINGLE_FLIT_LINK_0",
  "UPMC", 
   0x40,0x07}
, {"UNC_QPI_TX_STALLED_SINGLE_FLIT_LINK_1",
  "UPMC", 
   0x40,0x38}
, {"UNC_QPI_TX_STALLED_MULTI_FLIT_DRS_LINK_0",
  "UPMC", 
   0x40,0x01}
, {"UNC_QPI_TX_STALLED_MULTI_FLIT_NCB_LINK_0",
  "UPMC", 
   0x40,0x02}
, {"UNC_QPI_TX_STALLED_MULTI_FLIT_NCS_LINK_0",
  "UPMC", 
   0x40,0x04}
, {"UNC_QPI_TX_STALLED_MULTI_FLIT_DRS_LINK_1",
  "UPMC", 
   0x40,0x08}
, {"UNC_QPI_TX_STALLED_MULTI_FLIT_NCB_LINK_1",
  "UPMC", 
   0x40,0x10}
, {"UNC_QPI_TX_STALLED_MULTI_FLIT_NCS_LINK_1",
  "UPMC", 
   0x40,0x20}
, {"UNC_QPI_TX_STALLED_MULTI_FLIT_LINK_0",
  "UPMC", 
   0x40,0x07}
, {"UNC_QPI_TX_STALLED_MULTI_FLIT_LINK_1",
  "UPMC", 
   0x40,0x38}
, {"UNC_QPI_TX_HEADER_BUSY_LINK_0",
  "UPMC", 
   0x42,0x02}
, {"UNC_QPI_TX_HEADER_BUSY_LINK_1",
  "UPMC", 
   0x42,0x08}
, {"UNC_QPI_RX_NO_PPT_CREDIT_STALLS_LINK_0",
  "UPMC", 
   0x43,0x01}
, {"UNC_QPI_RX_NO_PPT_CREDIT_STALLS_LINK_1",
  "UPMC", 
   0x43,0x02}
, {"UNC_DRAM_OPEN_CH0",
  "UPMC", 
   0x60,0x01}
, {"UNC_DRAM_OPEN_CH1",
  "UPMC", 
   0x60,0x02}
, {"UNC_DRAM_OPEN_CH2",
  "UPMC", 
   0x60,0x04}
, {"UNC_DRAM_PAGE_CLOSE_CH0",
  "UPMC", 
   0x61,0x01}
, {"UNC_DRAM_PAGE_CLOSE_CH1",
  "UPMC", 
   0x61,0x02}
, {"UNC_DRAM_PAGE_CLOSE_CH2",
  "UPMC", 
   0x61,0x04}
, {"UNC_DRAM_PAGE_MISS_CH0",
  "UPMC", 
   0x62,0x01}
, {"UNC_DRAM_PAGE_MISS_CH1",
  "UPMC", 
   0x62,0x02}
, {"UNC_DRAM_PAGE_MISS_CH2",
  "UPMC", 
   0x62,0x04}
, {"UNC_DRAM_READ_CAS_CH0",
  "UPMC", 
   0x63,0x01}
, {"UNC_DRAM_READ_CAS_AUTOPRE_CH0",
  "UPMC", 
   0x63,0x02}
, {"UNC_DRAM_READ_CAS_CH1",
  "UPMC", 
   0x63,0x04}
, {"UNC_DRAM_READ_CAS_AUTOPRE_CH1",
  "UPMC", 
   0x63,0x08}
, {"UNC_DRAM_READ_CAS_CH2",
  "UPMC", 
   0x63,0x10}
, {"UNC_DRAM_READ_CAS_AUTOPRE_CH2",
  "UPMC", 
   0x63,0x20}
, {"UNC_DRAM_WRITE_CAS_CH0",
  "UPMC", 
   0x64,0x01}
, {"UNC_DRAM_WRITE_CAS_AUTOPRE_CH0",
  "UPMC", 
   0x64,0x02}
, {"UNC_DRAM_WRITE_CAS_CH1",
  "UPMC", 
   0x64,0x04}
, {"UNC_DRAM_WRITE_CAS_AUTOPRE_CH1",
  "UPMC", 
   0x64,0x08}
, {"UNC_DRAM_WRITE_CAS_CH2",
  "UPMC", 
   0x64,0x10}
, {"UNC_DRAM_WRITE_CAS_AUTOPRE_CH2",
  "UPMC", 
   0x64,0x20}
, {"UNC_DRAM_REFRESH_CH0",
  "UPMC", 
   0x65,0x01}
, {"UNC_DRAM_REFRESH_CH1",
  "UPMC", 
   0x65,0x02}
, {"UNC_DRAM_REFRESH_CH2",
  "UPMC", 
   0x65,0x04}
, {"UNC_DRAM_PRE_ALL_CH0",
  "UPMC", 
   0x66,0x01}
, {"UNC_DRAM_PRE_ALL_CH1",
  "UPMC", 
   0x66,0x02}
, {"UNC_DRAM_PRE_ALL_CH2",
  "UPMC", 
   0x66,0x04}
};
